A technology is conventionally disclosed which fabricates SRAMs (Static Random Memory) with tunnel transistors. The tunnel transistor (TFET) can operate at low voltages. The SRAM does not originally require a refresh operation, but maintains a data holding state with a leak current flowing through a memory cell. A semiconductor memory device is desired which makes use of the characteristics of the tunnel transistor that can operate at low voltages and can reduce power consumption required to hold data.